1. Technical Field
The present invention relates to a method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit.
2. Related Art
An integrated circuit, which may include a semiconductor chip, comprises electronic devices on a bulk silicon wafer, and metallic wiring patterns which conductively couple the electronic devices, resulting in formation of electrical circuits. xe2x80x9cConductivexe2x80x9d and like words means xe2x80x9celectrically conductivexe2x80x9d herein, unless otherwise stated. The electronic devices include field effect transistors, bipolar transistors, diodes, etc. The metallic wiring patterns include conductive wiring lines, metal-plated vias, etc. In integrated circuits, the metallic wiring patterns are multi-layered, wherein each layer includes intra-layer metallic wiring patterns embedded within insulative material such as dielectric material. Intra-layer metallic wiring patterns of a given layer may be conductively coupled to intra-layer metallic wiring patterns in one or more other layers, as well as to the electronic devices.
The electronic devices of the integrated circuit require bias voltages and reference voltages, which are supplied by conventional or standard voltage sources. A conventional or standard voltage source includes a battery or the like which is readily commercially available. For particular integrated circuit applications requiring nonstandard bias and nonstandard reference voltages, conventional or standard voltage sources may be inadequate. A nonstandard bias or nonstandard reference voltage is any voltage not included in the voltages supplied by the standard voltage source.
There is a need for a method and structure to supply nonstandard bias voltages and nonstandard reference voltages in accordance with special requirements of particular integrated circuits.
The present invention provides an electrochemical structure within an integrated circuit, comprising:
semiconductor wafer;
a layer of electronic devices on the semiconductor wafer, wherein the layer of electronic devices includes at least one electronic device;
N wiring levels on the layer of electronic devices, wherein N is at least 1, wherein the N wiring levels are denoted as wiring level 1, wiring level 2, . . . , wiring level N, and wherein the N wiring levels include a first conductive metallization and a second conductive metallization; and
at least one battery within the wiring levels I, I+1, . . . K, wherein I is selected from the group consisting of 1, 2, . . . , and N, wherein K is selected from the group consisting of I, I+1, . . . , and N, wherein the first conductive metallization conductively couples a first electrode of the at least one battery to the at least one electronic device, and wherein the second conductive metallization conductively couples a second electrode of the battery to the at least one electronic device.
The present invention provides a method for forming an electrochemical structure within an integrated circuit, comprising:
providing a semiconductor wafer;
forming a layer of electronic devices on the semiconductor wafer, wherein the layer of electronic devices includes at least one electronic device;
forming N wiring levels on the layer of electronic devices, wherein N is at least 1, wherein the N wiring levels are denoted as wiring level 1, wiring level 2, . . . , wiring level N;
forming a first conductive metallization and a second conductive metallization within the N wiring levels; and
forming at least one battery within the wiring levels I, I+1, . . . K, wherein I is selected from the group consisting of 1, 2, . . . , and N, wherein K is selected from the group consisting of I, I+1, . . . , and N, wherein the first conductive metallization conductively couples a first electrode of the at least one battery to the at least one electronic device, and wherein the second conductive representation conductively couples a second electrode of the battery to the at least one electronic device.
The present invention supplies nonstandard bias voltages and nonstandard reference voltages in accordance with special requirements of particular integrated circuits. The present invention also avoids using external voltage sources for supplying voltage to integrated circuits that require low-power input, wherein the external voltage sources require more wiring levels, have a larger size, or occupy a larger volume.